尊龙凯时·(中国)·官方网站

    チップアセンブリ/テスト

    チップアセンブリ/テスト

    Design service Lab provide test chip engineer testing service based on wafer and package sort. The test chips include SOC, NVM memory/Library IP, high speed interface IP, Mixed signal and RF IP. The lab can also support DIP,COB, QFP quick package.

    01

    IP Testing

    02

    SoC Testing

    03

    Bonding Service

    04

    RF wafer level testing

    For more information, please contact your account manager or login to SMIC NOW

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